1. Field of the Invention
The invention relates to a switching power supply unit which switches input voltage to produce output voltage that is different from the input voltage, and to a controller IC thereof.
2. Description of the Related Art
In a portable cellular phone, a digital camera, a PDA, and a personal computer, a higher DC voltage is often required to be produced from a low power supply voltage such as a battery cell. In such a case, the higher DC voltage might be produced from a switching power supply unit, however, in many cases, it might be difficult for an actual apparatus to perform all the control operations, including a PWM control operation, at a low power supply voltage. For this reason, a conventional switching power supply unit is provided with a low-voltage operating block capable of operating at a low voltage within the range from 1.0 to 1.5 volts or thereabouts such as disclosed in JP-A-8-186980. In said reference, disclosed is the circuit configuration such that at start up timing, a battery voltage is first boosted up to a voltage at which another regular operating block for performing PWM control or the like can be operated, by means of the low-voltage operating block. Subsequently, to the operation is shifted to the regular PWM control operation.
FIG. 3 is a view showing the configuration of a switching power supply unit 200 in which such a conventional switching power supply unit has been partially modified in accordance with actual use, thereby producing a higher DC voltage from a low power supply voltage. FIG. 4 is a view schematically showing a characteristic of the start-up of the switching power supply unit 200 shown in FIG. 3.
In FIG. 3, a battery BAT, such as the one including two nickel hydrogen battery cells, is serving as a DC power supply use, whose battery voltage Vbat of the battery is about 1.5 volts. The voltage Vbat is connected to the earth by way of an inductor Lo and a switching transistor Qo serving as an NPN transistor. The switching transistor Qo is switched between on and off in response to a switching control signal Sout. A collector voltage of the switching transistor Qo is rectified and smoothed by a rectifier diode Do and a smoothing capacitor Co, whereby an output voltage Vo is output (e.g., 5.0 volts is output at the time of a stationary state).
The switching control signal Sout provided to the switching transistor Qo is produced and output by a controller IC 20. A commonly-used voltage control method is to feed back the output voltage Vo, compare the output voltage Vo with a reference voltage to produce an error signal which is compared with a triangular wave signal so as to produce a pulse width modulation (PWM) signal, and perform a switching-control to the switching transistor Qo according to the pulse width modulation signal.
However, an actual apparatus often encounters difficulty in performing all control operations such as PWM control operation at a low voltage on the order of 1.5 volts or thereabouts. Therefore, the switching power supply unit shown in FIG. 3 has a low-voltage operating block LVB which is capable of operating at a low voltage (e.g., 1.5 volts). At start-up, the low-voltage operating block LVB boosts the battery voltage Vbat to a voltage (e.g., 2.5 volts) at which another ordinary high-voltage operating block HVB for performing PWM control or the like can operate. Subsequently, this system shifts operation to an ordinary PWM control operation.
The configuration of the controller IC 20 will be further described. The battery voltage Vbat is input to a battery voltage terminal Pbat of the controller IC 20, which is provided to individual circuits operated at a low voltage. Further, the output voltage Vo is input directly to an output voltage terminal Pvo of the controller IC 20. The output voltage Vo serves as a comparison input for a comparator CP0, and also fed to the individual circuits which require a high voltage. Further, the feedback voltage Vfb obtained by the output voltage Vo being divided by potential-divider resistors R1, R2 is input to a feedback voltage terminal Pfb.
The high-voltage operating block HVB that operates under normal conditions has an error amplifier Eamp which outputs an error output signal E0 between the feedback voltage Vfb and a second reference voltage Vref2 which is fed back from an error output terminal Peo to the feedback voltage terminal Pfb by way of a feedback capacitor C1 and a resistor R3; a triangular wave signal oscillator OSC2; a PWM comparator CP2 which receives a triangular wave signal CT output from the oscillator OSC2, an error output signal EO, and a soft start voltage (hereinafter, “SS voltage”) Vss serving as a dead time control (DTC) voltage; and a second driver DR2 which amplifies an output of the PWM comparator CP2 which is output as the control signal Sout from a second control signal output terminal Pout2.
The PWM comparator CP2 compares the triangular wave signal CT with the error output signal EO or the SS voltage Vss, whichever signal is smaller. The second driver DR2 operates when an operating command signal (low level voltage in this case) is given to. The high-voltage operating block HVB cannot be operated sufficiently when the output voltage Vo is equal to or slightly higher than the battery voltage Vbat. Consequently, the second reference voltage Vref2 or the SS voltage Vss, whichever signal is smaller, serves as a reference voltage for controlling the high-voltage operating block HVB.
The low-voltage operating block LVB, operating at the start-up timing, has an oscillator OSC1 which starts oscillating upon receipt of the supplied battery voltage Vbat, to thus produce a rectangular wave pulse; and a first driver DR1 which amplifies a pulse produced by the oscillator OSC1 to be output as the control signal Sout from a first control signal output terminal Pout1. The first driver DR1 operates when an operating command signal (high level voltage in this case) is given to. The low-voltage operating block LVB operates sufficiently at the battery voltage Fbat regardless of the output voltage Vo.
The comparator CP0 compares the output voltage Vo with the first reference voltage Vref1, thereby produces a high-level or low-level output as a comparison result. The first reference voltage Vref1 is set to a voltage at which individual circuits of the high-voltage operating block HVB can operate sufficiently. Consequently, when the output voltage Vo has surpassed the first reference voltage Vref1, the second driver DR2 starts operating, and the first driver DR1 halts. The comparator CP0 owns a hysteresis characteristic in order to stabilize comparison operation.
The soft start block SSB has a soft start circuit SSC, a soft start capacitor Css and a soft start activation switch Q2. The soft start circuit SSC is connected in series to the external capacitor Css by way of a soft start terminal Pss. A node between the soft start terminal Pss and the external capacitor Css is connected to the earth by way of the soft start activation switch Q2 serving as an NMOS transistor. The soft start circuit SSC produces an SS voltage serving as a DTC voltage. Hence, in order to produce an SS voltage which is to serve as the DTC voltage, the soft start circuit SSC is formed from a resistance-type potential divider circuit which divides the power supply voltage by resistance and outputs the thus-divided voltage. A high-level or low-level output from the comparator CP0 is applied to a gate of the activation switch Q2.
Operation of the switching power supply unit 200 having such a configuration; particularly, operation of the switching power supply unit 200 performed at start-up, will be described further by reference to FIG. 4.
When the oscillator OSC1 has started oscillating operation at point in time t1, the switching power supply unit 200 starts operation. Immediately after the oscillator OSC1 has started operation, the output voltage Vo corresponds to the battery voltage Vbat, which is lower than the first reference voltage Vref1 (Vo<Vref1). Hence, an output from the comparator CP0 is at high level. Therefore, the second driver DR2 remains inoperative; the activation switch Q2 remains at on-state; and the first driver DR1 remains in an operating state. Individual circuits of the low-voltage operating block LVB also operate at the battery voltage Vbat, which is a low voltage. Hence, the oscillator OSC1 outputs a rectangular wave pulse having a predetermined frequency. The rectangular wave pulse is amplified by the first driver DR1, whereby the amplified pulse is output as a control signal Sout by way of the control signal output terminal Pout1 to control the on-off states of the switching transistor Qo.
As a result of on-off control of the switching transistor Qo, the output voltage Vo gradually increases in the manner shown in FIG. 4, by means of charging and discharging energy into and from the inductor Lo.
At a point in time t2 at which the output voltage Vo has increased and surpassed the first reference voltage Vref1, the output from the comparator CP0 is inverted to a low level. As a result, the first driver DR1 shifts from an operating state to an inoperative state, whereas the second driver DR2 shifts from the inoperative state to the operating state. Further, the activation switch Q2 is turned off to start recharging the capacitor Css. Thus, soft start operation for PWM control is started.
The output voltage Vo achieved at the point in time t2 corresponds to the first reference voltage Vref1 at which individual circuits of the high-voltage operating block HVB can operate sufficiently. However, the soft start operation is commenced at the point in time t2. Hence, the control signal Sout is not output until the SS voltage Vss attains a level at which the voltage can be compared with the triangular wave signal CT. Consequently, the capacitor Co is not recharged with any more electric charge whereby the output voltage Vo cannot increase. This period is indicated by α in the drawing. Subsequently, as the SS voltage Vss increases, PWM control is performed by taking the SS voltage Vss as a reference voltage, whereupon the output voltage Vo increases.
At the point in time t1 and subsequent points, the feedback voltage Vfb is lower than the second reference voltage Vref2, whereby the error output signal EO remains at a high level continuously. The PWM comparator CP2 compares the triangular wave signal CT with the error output signal EO or the SS voltage Vss, whichever signal is lower. When the feedback voltage Vfb approaches the second reference voltage Vref2 as a result of an increase in the output voltage Vo, the error output signal EO decreases. At a point in time t3 at which the error output signal EO becomes equal to the ever-increasing SS voltage Vss, the control reference used for PWM control shifts from the SS voltage Vss to the error output signal EO. As a result, normal feedback control is performed, and the output voltage Vo is subjected to PWM control such that the feedback voltage Vfb becomes equal to the second reference voltage Vref2.
In the conventional switching power supply unit, when operation of the low-voltage operating block LVB is switched to operation of the high-voltage operating block HVB at time t2 shown in FIG. 4, there arise a period during which an oscillating operation stops and a period during which only a pulse width narrower than a required pulse width is obtained. Therefore, although it depends on its load conditions, a start-up failure might arise under such a condition that the output voltage Vo is supplied to a load during the period α shown in FIG. 4 and subsequent periods during which a PWM pulse width is narrow, whereby the charge in the capacitor Co are supplied to the load, and consequently, the output voltage Vo decreases.
If, as a result of a decrease in the output voltage Vo, the output voltage Vo has becomes lower than the first reference voltage Vref1 in excess of the hysteresis width of the comparator CP0, the output of the comparator CP0 again attains a high level, thereby turning on the activation switch Q2. As a result, the capacitor Css that is being charged might be discharged. The switching operation and the soft start operation are again started after the output voltage Vo has been fully recovered by operation of the low-voltage operating block LVB. When these operations are repeated, an start-up failure might arise.
In order to avoid occurrence of such a situation, if soft start for PWM control is omitted, a large rush current might flow when it is switched from the control operation by the low-voltage operating block LVB to the control operation by the high-voltage operating block HVB. This might bring about adverse effect to the battery power supply or cause an inconvenience of a large drop in the battery voltage Vbat.
The control operation by the low-voltage operating block LVB is ON/OFF control without a feedback due to the rectangular pulse of the oscillator OSC1. Hence, there arises a problem that a rush current flows at the time of start-up.
There may also arise a problem that ringing in the output voltage Vo occurs around at the timing of t3 when the control reference voltage to be compared with the triangular wave signal CT shifts from the SS voltage Vss to the error output signal EO.